LTC1647-1/
LTC1647-2/LTC1647-3
14
1647fa
Supply Glitching
LTC1647 Hot Swap circuits on the backplane are generally
used to provide power-up/down sequence at insertion/
removal as well as overload/short-circuit protection.
If a short-circuit occurs at supply ramp-up, the circuit
breaker trips. The partially enhanced MOSFET , Q1, is easily
disconnected without any supply glitch.
If a dead short occurs after a supply connection is made
(Figure 12), the sense resistor R1 and the R
DS(ON)
of fully
enhanced Q1 provide a low impedance path for nearly
unlimited current flow. The LTC1647 discharges the GATE
pin in a few microseconds, but during this discharge time
current on the order of 150 amperes flows from the V
CC
power supply. This current spike glitches the power sup-
ply, causing V
CC
to dip (Figure 12a and 12b).
On recovery from overload, some supplies may overshoot.
Other devices attached to this supply may reset or
malfunction and the overshoot may also damage some
components. An inductor (1糎 to 10糎) in series with
Q1s source limits the short-circuit di/dt, thereby limiting
the peak current and the supply glitch (Figure 12a and
12b). Additional power supply bypass capacitance also
reduces the magnitude of the V
CC
glitch.
APPLICATIONS INFORMATION
V
ID
Power Controller
The two Hot Swap channels of the LTC1647 are ideally
suited for V
ID
power control in portable computers.
Figure 13 shows an application using the LTC1647-2 on the
system side of the device bay interface (1394 PHY and/or
USB). The controller detects the presence of a peripheral
in each device bay and controls the LTC1647-2. The timing
waveform illustrates the following sequence of events: t1,
rising out of undervoltage lockout with GATE 1 ramping up;
t2, load current fault at R1; t3, circuit breaker resets with
R5/C3 delay; t4/t5, controller gates off/on device supply
with RC delay; t6, device enters undervoltage lockout.
If C6 is not connected in Figure 13, FAULT2 and ON2 will
have similar waveforms. t7 initiates an ON sequence; t8, a
load fault is detected at R7 with FAULT2 pulling low. If the
controller wants to stretch the interval between retries, it
can pull ON2 low at t9 ( t9 t8 < 0.4"t
RESET
). At t10/t11,
the controller initiates a new power-up/down sequence.
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